FPGA Acceleration of Swap-Based Tabu Search for Solving Maximum Clique Problems

The Swap-Based Tabu Search (SBTS) is a heuristic algorithm for solving the maximum independent set problems and can solve clique as well because in graph equivalent to its complementary graph. Although SBTS powerful has abundant inherent parallelism, it difficult parallelize of solution searching involving indirect indexing on array components. In this paper, we show variant that does not require while maintaining same accuracy original version describe hardware acceleration using Field-Programmable Gate Array (FPGA). Experimental results our proposed FPGA up 51.1 times faster than CPU 5.40 CPU, respectively.